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hardware:vaillantvrt340f [2017/05/05 11:37] – reinhold | hardware:vaillantvrt340f [2017/05/05 16:34] – reinhold |
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As my reasoning in part 2 shows, that extra byte must be before the final three bytes, but after the fifth-to-last one. So we have the 9-bit sequence 101111101 that we must make sense of. Even worse, the last two observations appear to be shifted by one additional bit after a bit sequence of 01111100. | As my reasoning in part 2 shows, that extra byte must be before the final three bytes, but after the fifth-to-last one. So we have the 9-bit sequence 101111101 that we must make sense of. Even worse, the last two observations appear to be shifted by one additional bit after a bit sequence of 01111100. |
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After some googling, I stumbled upon the [[https://en.wikipedia.org/wiki/High-Level_Data_Link_Control#Framing|framing approach in the High-Level Data Link Control]], where the frames start with 0x7e=01111110 and the bit stuffing in the data part means that after five consecutive 1 bits, an extra 0 bit is included, which must be removed at the receiving end. Indeed, the 101111101 bit sequence is the only appearance of five consecutive 1 bits in the first few examples. Some other signals also contained sequences of 5 (but not more) consecutive 1 bits, followed by a seemingly spurious zero... Bit stuffing would explain this spurious 0 bit and even demand to remove it before interpreting the signal. If we do bit unstuffing on our signals, suddenly the signal aligns perfectly into octets to form bytes: | After some googling, I stumbled upon the [[https://en.wikipedia.org/wiki/High-Level_Data_Link_Control#Framing|framing approach in the High-Level Data Link Control]], where the frames start with 0x7e=01111110 and the bit stuffing in the data part means that after five consecutive 1 bits, an extra 0 bit is included, which must be removed at the receiving end. Indeed, the 101111101 bit sequence is the only appearance of five consecutive 1 bits in the first few examples. Some other signals also contained sequences of 5 (but not more) consecutive 1 bits, followed by a seemingly spurious zero... Bit stuffing would explain this spurious 0 bit and even demand to remove it before interpreting the signal. If we do bit unstuffing on our signals (again, using a little helper utility [[https://github.com/kainhofer/vaillant-calormatic340f/blob/master/Vaillant_decode_bitstuff.c|Vaillant_decode_bitstuff.c]]), suddenly the signal aligns perfectly into octets to form bytes: |
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| ''00000000\ 00000000\ 01111110\ 10110110\ 01101111\ 00000000\ 00000100\ 00000000\ 00000000\ 00010001\ 00101101\ 00000000\ 10111111\ 10000010\ 11111111\ 00000000'' | | | ''00000000\ 00000000\ 01111110\ 10110110\ 01101111\ 00000000\ 00000100\ 00000000\ 00000000\ 00010001\ 00101101\ 00000000\ 10111111\ 10000010\ 11111111\ 00000000'' | |